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GEB Enterprise

GEB Enterprise

BSPIO-DIO888

Digital Modules for Boundary Scan I/O Access

JTAG discrete (High Voltage) parallel I/O module

The BSPIO-DIO888 provides bi-directional parallel-scan access to up to 40 electrical I/O nodes, 24 with high voltage level and 16 nodes with standard TTL level, for the driving and sensing of logic values. This module increases the effectiveness of boundary-scan testing, enabling verification of board edge and on-board connectors and within logic clusters.

Features:

  • 24 Discrete High Voltage discrete I/O channels for interface logic drive and sense
  • 16 I/O TTLs, drives 3.3V logic,  5V tolerant
  • High reliability DIN41612 I/O connector
  • Reliable screw lock brackets
  • Size  122mm X 70mm
  • Discrete I/O organized in 3 segment of 8 pins each
  • 96 bit Boundary-scan Register Length
  • Each segment can be independently bypassed
  • Medium-speed 10MHz TCK for high reliability at the best cost/performance ratio
  • Each I/O pin is independently programmable for sense, drive, bi-directional, and tri-state operation
  • Fully-compatible JTAG/IEEE 1149.1 Test Access Port (TAP)
  • Operating power 3.3V, 5.0V
  • Optional LVDS TCK interface can be used in large fixtures to avoid noise and skew problems.
  • Full self test capability using internal loopback.

The BSPIO-DIO888 is available in two basic versions, both of them compatible with standard DIN41612 female connectors in a test fixture. One version, the BSPIO-DIO888-A1, is primarily intended for test fixtures with few BSPIOs, and contains a standard TTL interface on the TAP’s TCK signal. This module facilitates boundary-scan interconnection testing using direct connection to a JTAG/IEEE 1149.1 Test Access Port (TAP).
The other version, the BSPIO-DIO888-A2, is intended for test fixtures with many BSPIOs and contains a balanced LVDS interface on the TAP’s TCK signal. This module facilitates boundary-scan interconnection testing using a small interface connection to a JTAG/IEEE 1149.1 TAP. All BSPIO I/O interfaces have an internal loopback to ensure the self test capability.

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