All I/O registers PCIe FPGA system

Simple Slave Registers Peripheral

The All I/O registers PCIe FPGA system includes all Customer needs to start designing and practicing with PCI-Express using preferably GEB Enterprise PCIe boards family. It make available 7 PIOs totally settable as inputs or outputs, to manage the pins available on the I/O connectors.

Using QSYS the following IP has been instanzied and configured:

• 1 PCIe Hard IP
• 7 PIOs totally settable as inputs or outputs
• 1 EPCS Flash controller

Moreover, a simple Test Application is provided in conjunction with the device drivers (available for different x86 platforms). The Test Application allows the user to easily control I/O by means of an intuitive Graphical User Interface (GUI).

Furthermore, the provided source code allows you to understand how to use the drivers in a custom application

The system shall be changed by customer having a fully functioning start point.

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